d1907 ti im 20060124-s00004 no.a0991-1/6 LV8071LP overview the LV8071LP is a piezoelectric autofocus actuator driver ic for use in cell phone cameras. it internally generates drive waveforms, which reduces dsp load and makes it possible to control piezoelectric actuators by simple control signals. features the actuator using the piezoelectric device is driven by the external clk input and simple control signal. ? the 39mhz (clk1 pin input) clk input is divided into quarters internally to generate the 9.75mhz input. the operation time is generated using this as a base cl k to ensure the output approp riate for piezoelectric drive. the clk2 input of 9.75mhz is input to be used, as it is, for the base clk either. ? ic start/stop is controlled by the en input. initialization is made according to the built-in sequence at startup. ? the actuator drive time is determined by inputting the pulse to the drive pin. ? to recognize operation/stop of the actuator, the busy signal is output while the out pin performs any output. specifications maximum ratings at ta = 25 c, gnd = 0v parameter symbol conditions ratings unit supply voltage v cc max -0.5 to 6.0 v output current i o max 300 ma input signal voltage v in max -0.5 to v cc +0.5 v allowable loss pd mounted on a specified board* 700 mw operating temperature range topr -20 to +85 c storage temperature tstg -55 to +150 c note * : mounted on a specified board: 40.0mm 50.0mm 0.8mm, glass epoxy board ordering number : ena0991 bi-cmos ic piezoelectric actuator driver ic specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use.
LV8071LP no.a0991-2/6 allowable operating condtions at gnd = 0v parameter symbol conditions ratings unit supply voltage v cc 2.5 to 3.3 v input signal voltage v in 0 to v cc v input clk1 frequency fclk1 clk1 pin 39 mhz input clk2 frequency fclk2 clk2 pin 9.75 mhz drive ?h? minimum pulse width dh min 1clk=1/4clk1=clk2 96 clk drive ?l? minimum pulse width dl min 1clk=1/4clk1=clk2 96 clk maximum operation cycle frequency ct max 1 cycle = 87clk 140 cycles 170 times electrical characteristics at ta = 25 c, v cc = 2.8v, gnd=0v, unless otherwise specified. ratings parameter symbol conditions min typ max unit current drain at standby 0 i cc 0 no clk input 1.0 a current drain during operation i cc 1 at clk1=39mhz 0.4 0.7 ma ?h? level input voltage v ih 2.5v v cc 5.5v 0.8 v cc v cc v ?l? level input voltage v il 2.5v v cc 5.5v 0 0.1 v cc v output block upper-side on resistance ronp 1.0 1.5 output block lower-side on resistance ronn 1.0 1.5 turn-on time tplh at no load * 0.2 s turn-off time tphl at no load * 0.2 s note: the time for 10 90% at rise and 90 10% at fall is specified. package dimensions unit : mm (typ) 3318 2.6 2.6 0.4 0.8 0.25 (0.035) side view side view bottom view top view laser marked index 0.5 (0.55) (c0.116) (0.13) (0.125) 1 2 16 sanyo : vct16(2.6x2.6)
LV8071LP no.a0991-3/6 pin assignment block diagram resistance to be provided to the rfg pin in LV8071LP, insertion of the resistor between rfg and gn d pins enables suppression of the inrush current to the piezoelectric element. since the resistance value exerts influence on the actuator operation, determine the constant within the 0 to 3.3 range while checking the operation. 1 2 3 4 5 6 7 16 15 14 test2 8 9 10 13 12 11 clk1 clk2 (nc) busy out2 gnd rfg (nc) out1 (nc) v cc en m/i drive test1 top view LV8071LP 0 -20 0.8 0.3 0.4 0.1 0.7 0.6 0.5 0.2 20 0 40 60 80 100 0.36 ambient temperature, ta- c pd max - ta allowable power dissipation, pd max - w ilv00256 mounted on a specified board: 40.0mm 50.0mm 0.8mm, glass epoxy 4-layer substrate (2s2p) v cc out1 gnd clk1 m/i drive out2 rfg gate a gate b en clk2 test1 test2 busy busy clk select quarter- dividing circuit actuator drive waveform generated
LV8071LP no.a0991-4/6 description of the operation ? clk1 and clk2 inputs clk1 incorporates the quarter-dividing circuit. to input 39mhz directly, input it directly to the clk1 pin. when the dividing circuit is provided externally, input 9.75mhz to the clk2 pin. short-circuit the unused clk pin to gnd. ? 1 cycle: one cycle (8.923 s for clk1=39mhz or clk2=9.75mhz) of out waveform operation is used as one unit of output operation. the drive waveform appropriate to piezoelectric drive as shown below is generated in ic. (1clk=1/4clk1=1clk2) ? en input: l input causes the ic functions to stop to s uppress the current drain in the standby state. h input causes ic to start. after initia lization according to the start sequence, the drive pin is ready to accept the input. ? initialization: internal sequence to move the actuator to the initial position at start of ic. after the operation of 140 cycles 170 times in the direction, the standby time of 140 cycles 4 times is secured. then, 140 cycles 2 times of return operation is made in the macro direction. ? drive input: operation time setting pin. the pin performs 140 cycles of operation per pulse at pulse input. to prevent noise-induced error, the input with the pulse h/l width of 96clk (9.85 s when clk = 39mhz) respectively is not accepted. ? m/i input: actuator operation direction setting pin. actuator is set in the macro direction at the input h and in the direction at the input of l. the actuator stops operation if m/i is ch anged over even when it is operating with the drive pulse. ? test1/2 setting pin for ic inspection. short-circuit this pin with gnd during actual use. ? busy output: the signal output pin, which outputs ?h=vcc voltage while the actuator is operating and ?l? when the actuator is stopped. 87clk = 1 cycle 23clk 4clk 34clk
LV8071LP no.a0991-5/6 timing chart (for clk1=39mhz) enlarged view of gate signal sequence initialization sequence at startup operating in the direction gate a 8.923 s gate b 2.359 s 3.487 s 410ns 2.359 s 3.487 s 2.359 s 2.359 s 3.487 s 3.487 s 410ns gate a drive gate b m/i operation for 2 pulses = 280 cycles en 8.923 direction logic select macro direction logic select operating in the direction operating in the macro direction operation stop with en input at ?l? 280 cycles = 5.00ms busy busy output ?h? only during operation returns to ?h? with ?en=l? even during operation gate a en gate b 8.923 direction 140 cycles 170 = 212.3ms start with en=h. initialization sequence starts. operating in the macro direction 140 cycles 2 = 2.50ms initialization about 220ms busy busy output ?h? during initialization busy output ?l? at end of initialization 140 cycles 4 = 5.00ms standby state ?h? during initialization even in the standby state
LV8071LP no.a0991-6/6 ps this catalog provides information as of december, 2007. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsibil ity for equipment failures that result from using products at values that exceed, even momentarily, rated v alues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qua lity high-reliability products, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these probabilistic failures or malfunction could give rise to accident s or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the us e of the technical information and products mentioned above. information (including circuit diagrams and circuit par ameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained he rein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control l aws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.
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